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Rating: Summary: A study of fast processor design Review: Whether trying to maximize the speed of a standard cell ASIC processor design or minimize the design time of a full custom processor this book describes, in detail, the considerations involved. The authors draw on real-world designs and extensively review several in particular. The book describes the impact on resulting processor performance of pipeline depth, clock tree design, register and latch choice, setup and clock-to-q times, slack passing, dynamic logic, logic design style, richness of standard cell library, wire and transistor sizing, floorplanning and other layout concerns, and the exploitation of process variation.This book focuses strictly on processor circuit design and does not discuss software design, instruction set architecture, or die size and power issues.
Rating: Summary: A study of fast processor design Review: Whether trying to maximize the speed of a standard cell ASIC processor design or minimize the design time of a full custom processor this book describes, in detail, the considerations involved. The authors draw on real-world designs and extensively review several in particular. The book describes the impact on resulting processor performance of pipeline depth, clock tree design, register and latch choice, setup and clock-to-q times, slack passing, dynamic logic, logic design style, richness of standard cell library, wire and transistor sizing, floorplanning and other layout concerns, and the exploitation of process variation. This book focuses strictly on processor circuit design and does not discuss software design, instruction set architecture, or die size and power issues.
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