Rating: ![1 stars](http://www.reviewfocus.com/images/stars-1-0.gif) Summary: An attractive title but not attractive contents Review: If tomorrow I'll start my own book on Verilog and FPGA design, blame Ken Coffman for that. "Real World" to me means "advanced", coming from a consultant with years of experience, showing me tips and tricks not taught in academic institutions. To my surprise, this book contains almost no new info for me, and I just got my BS in ECE. According to the author's comments on this bboard (which I think are inappropriate, esp. ratings), his book is for the newbies. Well, then... it shouldn't be called "Real World"; ... a newbie wouldn't be able to follow it. A newbie book should explain the theory behind and applications of the digital hardware design, and it shouldn't go down to the dirty details of the design. This book doesn't cover neither the theory (Verilog, FPGA architecture, analog/transistor stuff, CAD, synthesis, etc.) nor the "dirty" details (optimization tricks, advanced timing, tools info, etc). Unfortunately, I find this book the latest in series of "Teaching youself Verilog in 21 days" or "Verilog for Dummies" books that have appeared recently. I guess they are intented to attract all those self-taught "IT Professionals" who are now unemployed to the field of ECE. I hope not.
Rating: ![2 stars](http://www.reviewfocus.com/images/stars-2-0.gif) Summary: You can make money selling books on Verilog, too! Review: If tomorrow I'll start my own book on Verilog and FPGA design, blame Ken Coffman for that. "Real World" to me means "advanced", coming from a consultant with years of experience, showing me tips and tricks not taught in academic institutions. To my surprise, this book contains almost no new info for me, and I just got my BS in ECE. According to the author's comments on this bboard (which I think are inappropriate, esp. ratings), his book is for the newbies. Well, then... it shouldn't be called "Real World"; ... a newbie wouldn't be able to follow it. A newbie book should explain the theory behind and applications of the digital hardware design, and it shouldn't go down to the dirty details of the design. This book doesn't cover neither the theory (Verilog, FPGA architecture, analog/transistor stuff, CAD, synthesis, etc.) nor the "dirty" details (optimization tricks, advanced timing, tools info, etc). Unfortunately, I find this book the latest in series of "Teaching youself Verilog in 21 days" or "Verilog for Dummies" books that have appeared recently. I guess they are intented to attract all those self-taught "IT Professionals" who are now unemployed to the field of ECE. I hope not.
Rating: ![4 stars](http://www.reviewfocus.com/images/stars-4-0.gif) Summary: It is a nice book for a FPGA design with Verilog Review: Ken Coffman has 17 years experience with digital design. I have read through whole book in the passed few days. I have almost 5 years FPGA design experience with Nortel Network, Lucent Technologies. Through read this book, there are many interesting sections can enhance my design knowledge. This book covered a lot of fields such as how does using the design tools, How does doing the statistic timing analysis, coding style etc. I think it is a nice book for all FPGA designers.
Rating: ![0 stars](http://www.reviewfocus.com/images/stars-0-0.gif) Summary: A practical introduction to FPGA design with Verilog. Review: There are lots of good Verilog books on the market, but none that give a no-BS introduction to designing FPGAs. This book is for newbies. I don't think you can study these topics without covering the tools, this book is basically a Xilinx/Exemplar Logic/Silos III book. So, if you're looking for a fundamental book that will get you started in an area of technology that is exploding with opportunity, then give this book a try. Oh, in addition, you may get a laugh or two out of it. Enjoy!
Rating: ![1 stars](http://www.reviewfocus.com/images/stars-1-0.gif) Summary: Sloppy and incoherent, some useful information Review: This book addresses how to use Verilog to create working FPGA designs. It touches on topics such as clocking, implementation of specific types of logic blocks, and design flow. The examples are written using Verilog.
The writing is sloppy, the organization is incoherent, and the explanations are incomplete. A reader may find the book worthwhile if: he or she already knows most of the material presented, has a few problems that are addressed by the book, can find the discussion of that problem in the book, and the discussion is one of those that is complete and accurate. Otherwise, the book is a waste of time and money.
The author assumes that the reader is familiar with digital logic design, the basics of Verilog, and the basics of FPGA and ASIC design. The book discusses strategies for dealing with practical problems. Unfortunately, the strategies are presented in a disorganized manner, with explanations that are poorly thought out and too incomplete to use.
The first chapter introduces Verilog design for FPGA synthesis. The contents of the chapter are a mish-mash. It is hard to tell what you are supposed to know after reading the chapter that you didn't have to know before reading it. The chapter isn't a quick description of Verilog, because it leaves out most Verilog syntax that you have to know (for example, vectors). The chapter isn't limited to describing what subset of Verilog is synthesizable, because it has detailed but incomplete descriptions of random Verilog topics such as number formats (eg. 1'b0). There are even pages of tables showing boolean logic truth tables for basic logic primitives such as and, or, and xor.
The second chapter is a discussion of how FPGAs are implemented, and the effect that this has on synthesis. For example, clocking strategies are discussed, with some references to differences between FPGAs and ASICs. There is also a discussion of how a logic synthesizer might operate. A few other topics are thrown in, such as a discussion of DeMorgan's theorems. The chapter is too incomplete and poorly-written to be of much practical use. For example, although there is a description of how logic elements can be built out of transistors (including simplified schematics of one possible approach), there is no serious discussion of what implications this has. The book is about FPGA design, but the section on how logic functions are implemented in most FPGAs (as lookup tables) does not describe this in any detail.
The third and fourth chapters, regarding implementing specific digital circuits in FPGAs using Verilog, are potentially the most useful. The concept of the chapters is that they show how to write Verilog for useful functions in a way that can be synthesized well into FPGAs. If the chapters had been well organized and complete, the book would have been worth buying just for them. However, the chapters are as poorly-written as the rest of the book. Large sections are taken up with a discussion of writing adders and subtractors - showing that there is little point in doing so yourself instead of letting the synthesizer do it. However, the discussion of finite state machines - an important topic - covers state machines implemented using binary or Gray codes to represent states. The discussion of 'one-hot' state machines (frequently used in practice in FPGAs) is incomplete, describing only the problems, but failing to present an example that works (or any example at all). Similarly, the discussion of FIFOs (important to synchronize portions of large designs) is limited to a few notes about problems, without a single example. This is surprising, because the book emphasizes that the designer must solve clocking and synchronization problems across large designs, yet solutions to this problem (such as FIFOs) are not described.
The second half of the book, mainly chapters 5 through 8, describe how to use specific Verilog tools. The chapters are useless reiterations of documentation for obsolete versions of specific tools.
Chapter 9, the last chapter, is about designing for ASIC conversion. This could have been a useful chapter, because it covers an important topic.
All in all, I think this is a book to avoid.
On the positive side, this book seems to have fewer obvious editing errors than most other 'instant books'. Also, the typesetting is fairly normal, with reasonable sized text and reasonable margins. The organization and contents of the section headings is hard to understand, but that is a reflection of the disorganization of the book, rather than a problem with the design. The only significant problem I had with the graphic design of the book relates to the graphics, primarily schematics with some screen captures. The scaling is not uniform, so in a single explanation, the size of a schematic symbol and associated label might vary from graphic to graphic. However, this is a minor problem.
Rating: ![4 stars](http://www.reviewfocus.com/images/stars-4-0.gif) Summary: It scratched my itch.... Review: This book fit nicely in the gap I noticed between books on digital design with Verilog that were written from a structured academic standpoint and product specific user manuals and application notes. To learn effective FPGA design from books one would desire to have this book along with the other two; lacking "Real World FPGA Design" one would have to ask colleagues lots of questions and learn the rest the hard way. I am using this book as I 'retool' as a FPGA Digital Design Engineer since full-custom design jobs here are drying up since few companies can afford the investment of time and money to bring custom devices to market. I wish there was a book like this for the classic chip design world that I could wave at the newbie system and digital designers that wanted me to add an 8 input NOR gate to the library that could drive a fanout of 50 loads 10 mm away. Verilog is a many-faceted gem; I have been using it since the early 90's, albeit at the switch and structural level. This book is useful to me as I learn to design in Verilog at greater level of abstraction and it differs from other texts I have found in that it does not lose sight of the lower-level 'gotchas'. The only thing that keeps me from giving this book my highest rating is that there are some errors that do need correcting; the URL listed in another review here remedies that problem.
Rating: ![1 stars](http://www.reviewfocus.com/images/stars-1-0.gif) Summary: An attractive title but not attractive contents Review: When I start to use FPGA, I desperately searched book list and found this book. Its name sound like it has many tech-tip and expertise in it. But unfortunately I found this book doesn't have anything useful to me. It neither can solve my coding problem for FPGA, nor it can help me to understand more about the difference in design using FPGA compared to ASIC. This book teach me that I must check the table of contents carefully not just attracted by a beautiful title before I buy a book.
Rating: ![3 stars](http://www.reviewfocus.com/images/stars-3-0.gif) Summary: Original approach to Verilog - but needs tune up Review: When I started reading this book, I was excited about its potential. Written by an engineer, it did not focus on the language, but on real world engineering issues (how about an HDL design book that talks about robustness, metastability, etc. on its first pages?). The book does address many engineering issues, as well as real FPGA features and constraints that for many engineers take years to learn. Many of this information is there. But, and it's a big but, the information is not presented clearly. There are too many bugs for a teaching book. And the organization of the text is not good. Anyway, I would recommend this book to any design engineer interested in learning Verilog (but not as a first book, maybe as a second) Be sure to pay a visit to this site: http://www.bytechservices.com/verilog.htm#errata where there are corrections to the bugs on the book. About the companion CD: It's a fine piece of CD, with many utilities, of which the Silos Verilog simulator alone almost justifies buying the book itself (btw, you can also download Silos from the Internet) About myself: I'm a hardware design engineer, with about 10 years experience on the field and the last four years, at HDL design.
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