Rating: 
Summary: A Seminal work for hardware designers
Review: As a student in IC design, I am on the search for good books in the field and have made a considerable investment in a library. My budget is tight as a student and due to exchange rates, so good books are expensive for me.Of the books purchased so far, this is book is genuinely unique and a worthwhile purchase. One of my mentor's advised that books on verification are rare, he thought there was one other, but I couldn't find it. While I am still studying this book, I have found it to be the BEST I have purchased by far. It provides a unique insight into HDL design and verification. While it amazes many to read that so little work has been done in formalizing testing, a field consuming some 70 or more percent of design time, Janick provides an extremely valuable contribution. The content covers both Verilog and VHDL coding so suits everyone and contains ample code in both languages to illustrate the points raised. It starts with a case study of a bridge that collapsed to demonstrate the need and continues in a logical and comprehensible manner. The content builds in a way that a neophyte can easily understand, yet also would bore an experienced designer. Everyone in this field will learn useful skills There are a lot of hackneyed superlatives one could use to describe this work. In restricting myself to one, I choose seminal. The book has one minor drawback, my fourth print copy has a number of errors, in fact most of those from the second printing. Corrections are posted on the web site. While I am reluctant to recommend books because it inflates expectations, I encourage every HDL designer and student to get this book and the corrections. It is a classic and will serve you very well for a long time!
Rating:
Summary: A Seminal work for hardware designers
Review: As a student in IC design, I am on the search for good books in the field and have made a considerable investment in a library. My budget is tight as a student and due to exchange rates, so good books are expensive for me. Of the books purchased so far, this is book is genuinely unique and a worthwhile purchase. One of my mentor's advised that books on verification are rare, he thought there was one other, but I couldn't find it. While I am still studying this book, I have found it to be the BEST I have purchased by far. It provides a unique insight into HDL design and verification. While it amazes many to read that so little work has been done in formalizing testing, a field consuming some 70 or more percent of design time, Janick provides an extremely valuable contribution. The content covers both Verilog and VHDL coding so suits everyone and contains ample code in both languages to illustrate the points raised. It starts with a case study of a bridge that collapsed to demonstrate the need and continues in a logical and comprehensible manner. The content builds in a way that a neophyte can easily understand, yet also would bore an experienced designer. Everyone in this field will learn useful skills There are a lot of hackneyed superlatives one could use to describe this work. In restricting myself to one, I choose seminal. The book has one minor drawback, my fourth print copy has a number of errors, in fact most of those from the second printing. Corrections are posted on the web site. While I am reluctant to recommend books because it inflates expectations, I encourage every HDL designer and student to get this book and the corrections. It is a classic and will serve you very well for a long time!
Rating:
Summary: Excellent Coverage of Design and Test Methodology
Review: I found this books extremely well written in terms of technical content and style. Yes, style. The words are efficient and almost leap off the page to convey the author's intent. I enjoyed the discussion of VHDL versus Verilog in the very beginning. The methods presented for testing and verification are very insightful. Probably one of the best HDL books out there, period.
Rating:
Summary: The First of Its Kind
Review: I have been working with VHDL and Verilog for years but this
is the first book that treats the subject of testbenches seriously and comprehensively in both language.
I collect books and this is one of the best written books in my shelf. Highly recommended
Rating: 
Summary: Great content - can't wait for next edition
Review: I loved the book and it provided much information I needed - in a convoluted manner. I'm sure that Janick will improve upon this in the next edition and provide examples we all can use. Thank you for the book and it's content - To my knowledge 15 people I know have purchased it upon my recommendation.
Rating:
Summary: Great content - can't wait for next edition
Review: I loved the book and it provided much information I needed - in a convoluted manner. I'm sure that Janick will improve upon this in the next edition and provide examples we all can use. Thank you for the book and it's content - To my knowledge 15 people I know have purchased it upon my recommendation.
Rating:
Summary: Perhaps he should say this is how to make a standard cell
Review: In hardware development groups, the author points out that by 2000, from 60-80% of effort was in verification. But texts on VHDL rarely emphasise this. Instead, far more time is devoted to design. The creative focus is on the latter. The author instead says that from project inception, one should strive to design for verification. All the way from netlists. He suggests how to construct self checking systems. Surprisingly, initially, he nowhere discusses standard cells, and how you can use proven, tested standard cells in larger designs. But closer scrutiny of his arguments show that, implicitly, his techniques can be used to construct such cells, if they are not composed of smaller standard cells. It would have been nice if the index had an entry for standard cells, so that the reader could find this argument.
Rating: 
Summary: Great start but needs work
Review: It is great that we, as verification engineers, finally have a book focusing on streamlining and improving the verification process. This book covers all the basics for building a verification plan, implementing it, and maintaining it. It also includes a very large compliment of examples right alongside the concepts to improve understanding. However, it is unfortunate that the author is caught not following his own principles in each example. I feel that I would learn his principles better through repetition, where each example builds on the concepts already presented. He presents bus functional models in one chapter, then starts again at the top in the next. This makes it hard for me to see the big picture. One large example at the end could make it easier for me to see all his principles together in one testbench. Otherwise I'm stuck taking notes...
Rating:
Summary: Great start but needs work
Review: It is great that we, as verification engineers, finally have a book focusing on streamlining and improving the verification process. This book covers all the basics for building a verification plan, implementing it, and maintaining it. It also includes a very large compliment of examples right alongside the concepts to improve understanding. However, it is unfortunate that the author is caught not following his own principles in each example. I feel that I would learn his principles better through repetition, where each example builds on the concepts already presented. He presents bus functional models in one chapter, then starts again at the top in the next. This makes it hard for me to see the big picture. One large example at the end could make it easier for me to see all his principles together in one testbench. Otherwise I'm stuck taking notes...
Rating:
Summary: An instant industry classic.
Review: On the front lines of modern digital design, the challenges facing our industry are in implementing design reuse methods and the verification/validation of multi-million gate ASIC designs. Janick has been fighting these battles for many years and has written an excellent book, the first of its kind on the market. This is not a dry academic exercise; Janick reveals field-tested strategies, tips, and techniques. If you have any HDL books on your shelf, your collection is incomplete if you don't grab yourself a copy of this hot-selling book now.
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